XiaoXuan Logic

XiaoXuan Logic is a brand new and modern hardware description language (HDL) that lets you design hardware and chips in the same ease and collaboration as open-source software. Its built-in GPU-accelerated simulator dramatically enhances test efficiency, saving you valuable time and resources.

Features

• Synthesizing

  XiaoXuan Logic can compile to SystemVerilog TODO

• Visualize interacable simulation

  TODO

• Unit test

  TODO

• Modular

  TODO

Comparing with SystemVerilog

TODO

Quick start

TODO

Manuals and tutorials

• S90 - Building Your Own Linux-Capable CPU: A Step-by-Step Guide

  Design a RISC-V CPU core using XiaoXuan Logic

  2024-01-15
  • Digital circuit fundamentals: combinational and sequential circuits
  • Building a Blinky circuit, and interacting with the visual simulator
  • Synthesizing and downloading to FPGA hardware (Optional)
  • Introduction to RISC-V Instruction Architecture
  • Instruction decoder
  • Register File and Arithmetic Logic Unit (ALU)
  • Jump and branch instructions
  • Memory and load/store instructions
  • RISC-V calling convention ABI and implementing the functon calling
  • Memory mapping and implementing the UART peripheral
  • ROM and Building a simple program (firmware)
  • Synthesizing and downloading to FPGA hardware (Optional)
  • Interacting via USB-UART and terminal on computer